Radiation tolerant CMOS optical and wireline communication circuits KU Leuven
The next generation of integrated systems on chips (SoCs) for space applications demand a large scale of integration, combined with ever increasing susceptibility to single-event effects in nanoscale CMOS technologies such as 65 nm and 28 nm nodes and 22 nm FDSOI nodes. Many of these SoCs require the generation of clocks, frequencies or an exchange of serial data in the chip. In clock- or frequency synthesizers, a PLL is used to generate a ...