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Researcher
Nele Mentens
- Disciplines:Cryptography, privacy and security, Embedded systems
Affiliations
- Computer Security and Industrial Cryptography (COSIC) (Division)
Member
From1 Aug 2020 → Today - Dynamical Systems, Signal Processing and Data Analytics (STADIUS) (Division)
Member
From1 Aug 2020 → 31 Jul 2013 - Electrical Engineering Technology (ESAT), Diepenbeek Campus (Technology cluster)
Member
From1 Oct 2013 → 31 Jul 2020
Projects
1 - 10 of 23
- Trust-SEV: Hardware Root of Trust for Smart Electric VehiclesFrom26 Sep 2022 → TodayFunding: FWO Strategic Basic Research Grant, BOF - doctoral mandates
- Trusted Computing Architectures for IoT Devices (Trusted IoT)From1 Sep 2022 → TodayFunding: IWT / VLAIO - TETRA fund
- Evolutionary computation for the optimization of network intrusion detection systemsFrom27 Sep 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Design and implementation of efficient and secure cryptographic coprocessors in emerging technologiesFrom18 Aug 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Flipchip machine for wide-IO chip bondingFrom1 Jan 2021 → 31 Dec 2022Funding: BOF - scientific equipment program
- Holistic Co-Design and Integration in Power Electronic Converters for High Power Density Applications (CoDICApp)From1 Jan 2021 → 31 Dec 2022Funding: Fund Recuperation Fiscal Exemption
- Wearable real-time monitoring system for COVID positive hospitalized patients in the Euregio Meuse-RhineFrom1 Oct 2020 → 30 Sep 2021Funding: Other EU initiatives out of framework
- Embedded AI Techniques for Industrial ApplicationsFrom1 Sep 2019 → 31 Aug 2021Funding: IWT / VLAIO - TETRA fund
- Machine Learning for Network Intrusion Detection on FPGAFrom22 Aug 2019 → 23 Nov 2023Funding: Own budget, for example: patrimony, inscription fees, gifts
- FPGA design for large flow detection in high-speed networksFrom15 Apr 2019 → 26 Jan 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
31 - 40 of 110
- Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves(2020)
Authors: Nele Mentens
Pages: 270 - 276Number of pages: 7 - SHeLA: Scalable Heterogeneous Layered Attestation(2019)
Authors: Md Masoom Rabbani, Jo Vliegen, Jori Winderickx, Nele Mentens
Pages: 10240 - 10250 - Balancing elliptic curve coprocessors from bottom to top(2019)
Authors: Jo Vliegen, Nele Mentens
- Dynamic Logic Reconfiguration Based Side-Channel Protection of AES and Serpent(2019)
Authors: Nele Mentens
Pages: 277 - 282 - Work-in-Progress: Communication and security trade-offs for wearable medical sensor systems in hospitals(2019)
Authors: Jori Winderickx, Nele Mentens
Pages: 1 - 2 - In Hardware We Trust: Gains and Pains of Hardware-assisted Security(2019)
Authors: Nele Mentens
Pages: 1 - 4Number of pages: 4 - Security on Plastics: Fake or Real?(2019)
Authors: Nele Mentens, Jan Genoe, Thomas Vandenabeele, Lynn Verschueren, Dirk Smets, Wim Dehaene, Kris Myny
- SACHa: Self-Attestation of Configurable Hardware(2019)
Authors: Jo Vliegen, Md Masoom Rabbani, Nele Mentens
Pages: 746 - 751Number of pages: 6 - Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs.(2019)
Authors: Nele Mentens, Jo Vliegen
Pages: 1380 - 1380 - In Hardware We Trust: Gains and Pains of Hardware-assisted Security.(2019)
Authors: Lejla Batina, Patrick Jauernig, Nele Mentens, Ahmad-Reza Sadeghi, Emmanuel Stapf
Pages: 44:1 - 44:1
Patents
1 - 6 of 6
- Mitigating fpga related risks (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)
- Reconfigurable logic circuit (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)