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Researcher
Nele Mentens
- Disciplines:Cryptography, privacy and security, Embedded systems
Affiliations
- Computer Security and Industrial Cryptography (COSIC) (Division)
Member
From1 Aug 2020 → Today - Dynamical Systems, Signal Processing and Data Analytics (STADIUS) (Division)
Member
From1 Aug 2020 → 31 Jul 2013 - Electrical Engineering Technology (ESAT), Diepenbeek Campus (Technology cluster)
Member
From1 Oct 2013 → 31 Jul 2020
Projects
11 - 20 of 23
- ESCALATE: Efficient and Scalable Algorithms for Large Flow DetectionFrom1 Feb 2019 → 31 Jan 2023Funding: International Cooperation and Mobility
- High Power Density and High Efficiency Wide Band-Gap Power ConvertersFrom18 Jan 2019 → 15 Apr 2021Funding: Own budget, for example: patrimony, inscription fees, gifts
- DRASTIC: Dynamically Reconfigurable Architectures for Side-channel analysis protecTIon of Cryptographic implementationsFrom1 Oct 2017 → 30 Sep 2019Funding: BOF - Bilateral scientific cooperation
- Wearable Integrated Technology for Health Monitoring of Hospitalized Patients (WEARIT4HEALTH).From1 Nov 2016 → 31 Oct 2019Funding: Activities of International Cooperation, Own budget, for example: patrimony, inscription fees, gifts
- Energy-efficient and secure implementations for the IoTFrom5 Oct 2015 → 3 Mar 2020Funding: Own budget, for example: patrimony, inscription fees, gifts
- DynamIA - Dynamic Hardware Reconfiguration for Industrial Applications.From1 Jan 2015 → 31 Dec 2016Funding: IWT / VLAIO - TETRA fund
- SHIPS platform: Softcore Hardware Intellectual Property coreS platform.From1 Oct 2014 → 30 Sep 2016Funding: IOF - Industrial Research Fund
- EDA for hardware/software generation based on design space exploration.From1 Apr 2014 → 31 Mar 2015Funding: IOF - Industrial Research Fund
- 6LowPan - Towards zero-configuration for wireless building automation.From1 Jan 2013 → 31 Dec 2014Funding: IWT / VLAIO - TETRA fund
- True Random Number Generators for FPGAsFrom4 Jun 2012 → 28 Sep 2018Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
1 - 10 of 110
- Machine Learning for Network Intrusion Detection on FPGA(2023)
Authors: Laurens Le Jeune, Nele Mentens, Toon Goedemé
- PROVE: Provable remote attestation for public verifiability(2023)
Authors: Md Masoom Rabbani, Jo Vliegen, Nele Mentens
- Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications(2023)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
Pages: 302 - 318Number of pages: 17 - Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware(2023)
Authors: Arish Sateesan, Jelle Biesmans, Jo Vliegen, Nele Mentens
- Feature dimensionality in CNN acceleration for high-throughput network intrusion detection(2023)
Authors: Laurens Le Jeune, Toon Goedemé, Nele Mentens
Pages: 366 - 374Number of pages: 8 - Yes We CAN! Towards Bringing Security to Legacy-Restricted Controller Area Networks. A Review(2023)
Authors: Wouter Hellemans, Md Masoom Rabbani, Bart Preneel, Nele Mentens
Pages: 352 - 357 - Introduction to the Special Section on FPL 2020(2022)
Authors: Nele Mentens
- Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications(2022)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
- FOCUS: Frequency Based Detection of Covert Ultrasonic Signals(2022)
Authors: Md Masoom Rabbani, Jo Vliegen, Nele Mentens
Pages: 70 - 86 - In-depth energy analysis of security algorithms and protocols for the Internet of Things(2022)
Authors: Nele Mentens
Pages: 137 - 149
Patents
1 - 6 of 6
- Mitigating fpga related risks (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)
- Reconfigurable logic circuit (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)