On the accuracy of phase sensitive detectors implemented in FPGA technology

This paper investigates the possible causes of inaccuracy in a phase measurement system implemented using a digital lock-in amplifier architecture and built using FPGA technology. All contributions to the overall inaccuracy of the measurement are discussed and calculated or, when exact calculations cannot be made, their impact is carefully estimated. The theoretically derived worst case inaccuracies are compared with practical measurement results. The paper concludes that when phase measurement systems are used with signals with a low Signal to Noise Ratio (SNR), the low-pass filter in the lock-in amplifier plays a critical role in the overall accuracy of the system whereas for applications with a high SNR the Analog to Digital Converter (ADC) is the major contributor to the overall measurement inaccuracy.

Jaar van publicatie:2014

BOF-keylabel:ja

IOF-keylabel:ja

BOF-publication weight:1

CSS-citation score:1

Auteurs:International

Authors from:Higher Education