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Project

Structured Circuit Design with Thin Film Transistors for Large Area Electronics

Research done on the physics of thin film semiconductor materials in the last few decades, has resulted into an assortment of technologies to make semiconductor devices. With the device research approaching maturity, there is a push to deploy devices and circuit elements made in thin film technology, for relevant circuit designs. Unlike CMOS technologies that currently constitute a bulk of the integrated circuit production, thin film circuit integration can be done by deposition over arbitrary surfaces such as glass, metal or plastic, opening a new possibility for integrated circuit solutions. This technology is inherently large area and operates at higher voltages limiting the integration density. However, for some applications like displays, touchscreens that do require circuit elements with larger footprints, thin film technology has been historically in use. Despite the promise of novel circuit integration possibilities, thin film devices do not compare to the conventional CMOS device in terms of raw performance, limiting their areas of applications. The challenges in circuit design however, are not limited only to dealing with lower performance owing to very low mobility of the thin film semiconductor, but also owing to the lack of complementary devices amongst all the promising thin film technologies. Older organic thin film semiconductors result into device that only has a p-type transistor behaviour, whereas the metal-oxide thin film semiconductors only result into a n-type transistor. Circuit design with single channel devices makes for an interesting challenge, as many of the circuit design techniques are essentially built up from a complementary pair working in tandem. This presents an opportunity to explore novel circuit techniques that extract maximum performance despite of the limitation of working with only one type of device. On the application side where thin film transistors (TFT) have been used, such as display backplanes; the device has been primarily used as a switch. The recent trend is to use the TFTs in both digital and analog building blocks. Potential applications are on more functionality in the active matrix of displays, touchscreens and other types of sensors by moving the circuits closer to the sensor/transducer element. One application that has been explored in recent times is building passive RFID tags on plastic foils completely with TFT integration with digital logic, data path, memory as well as mixed signal blocks for the the front end. Additional potential applications are for human interface devices where circuits can potentially be integrated/molded into plastic blocks providing both sensing and feedback via e.g. haptics to enhance the user experience. To realize the applications mentioned above, circuit building blocks and system design flows need to be explored and developed. Thus making it possible to potentially use TFT technology in a design environment operating at higher abstraction level, i.e. lifted above the device technology underpinnings, akin to the manner in which a bulk of CMOS design happens in industry today. This PhD thus aims to work up from the base of the device technology research, to develop circuit building blocks such as standard cells, memories and analog/mixed signal blocks and validate the work via tape-out and characterization.

Date:17 Sep 2018  →  Today
Keywords:circuit design, thin film transistor, large area electronics
Disciplines:Sensors, biosensors and smart sensors, Other electrical and electronic engineering, Nanotechnology, Design theories and methods
Project type:PhD project