ESD Protection Design for RF & mm-Wave Circuits in CMOS Technologies
Nano-scale CMOS technologies have been used to implement RF and mm-Wave integrated circuits (ICs) with the advantages of scaling-down feature size, low power consumption, high integration capability, improving high-frequency characteristics, and low cost for mass production. However, with the scaled-down device size and the thinner gate oxide in advanced nano-scale CMOS technologies, the robustness of IC products against electrostatic discharge (ESD) were seriously degraded. Therefore, on-chip ESD protection circuits must be added on RF and mm-Wave ICs. Among the high-frequency circuits, the design issues and challenges between both the high-frequency internal circuits and the ESD protection circuits should be solved when the on-chip ESD protection circuits are added. For the RF circuits consideration, the parasitic capacitances from the ESD protection devices cause RF performance degradation, such as the signal loss. Moreover, the circuit in the whole RF transceiver block that would be easily damaged by ESD is the T/R switch circuits. For the ESD protection consideration, the ESD protection circuits should be turned on quickly before the internal RF circuits were damaged by ESD stress. Therefore, the turn-on resistance and trigger voltage are the critical items for the high-frequency ESD protection design. During the period in Ph.D. study, the design and implementation of on-chip ESD protection circuits to effectively protect RF and mm-Wave integrated circuits will be realized in the given advanced CMOS technologies. The EM tools (including Ansoft Designer, HFSS, ADS Momentum, etc.), the circuit simulation tools (including ADS, Spectre RF, etc.), and the layout tool (Cadence) are available in imec. Besides, the measurement environment will be also available in imec.