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Optimal Data Distribution for Versatile Finite Impulse Response Filtering on Next-Generation Graphics Hardware Using CUDA Universiteit Hasselt
In this paper, we investigate discrete finite impulse response (FIR) filtering of images, while harnessing the powerful computational resources of next-generation GPUs. These novel platforms exhibit a massive data parallel architecture with an advanced SIMT execution model and thread management, to enable designers to better cope with the infamous memory wall, i.e. the growing gap between the cost of data communication and computational ...
Iterating Von Neumann's post-processing under hardware constraints KU Leuven
© 2016 IEEE. In this paper we present a design methodology and hardware implementations of lightweight post-processing modules for debiasing random bit sequences. This work is based on the iterated Von Neumann procedure (IVN). We present a method to maximize the efficiency of IVN for applications with area and throughput constraints. The resulting hardware modules can be applied for post-processing raw numbers in random number generators.
Adaptive Hardware Architecture for Neural-Network-on-Chip Interuniversitair Micro-Electronica Centrum vzw
Neural networks are beneficial for several applications in classification and regression problems. Hardware implementation of a neural network is a challenge in terms of making adaptive architecture to fit different applications. Network-on-Chip (NoC) is an efficient method in power and bandwidth to make communication between several nodes. This paper proposes an adaptive neural network based on NoC. NoC consists of routers and Process Elements ...
Model-based firmware generation for acquisition systems using heterogeneous hardware Universiteit Antwerpen
High-performance sensing and control systems have an important role in Industry 4.0. However, with the current solutions, the development effort is high and requires specialized skills in electronic engineering. Therefore, a model-based approach on control and signal processing systems using affordable heterogeneous hardware is proposed. In this work, a model-based code generator is developed to abstract the user from the actual software ...
Optimal hardware and control co-design applied to an active car suspension setup Universiteit Antwerpen Universiteit Gent
For complex systems, it is not easy to obtain optimal designs for the hardware architecture and control configurations. Every design aspect influences the final performance, and often the interactions of the different components cannot be clearly determined in advance. In this work, a novel co-design optimization method was applied that allows the optimal placement and selection of actuators and sensors to be performed simultaneously with the ...
A flexible embedded hardware platform supporting low-cost human pose estimation Universiteit Antwerpen
Throughout the last decades, human motion capture systems have become an important tool for various sectors. Besides the entertainment sector, which is probably the most known sector to use these systems through popular movies and video games, the medical sector has adopted this technology as an analysis tool. These clinical analyses measure the human body posture and movement for various purposes including rehabilitation and sports, and require ...
A High-level Kernel Transformation Rule Set for Efficient Caching on Graphics Hardware - Increasing Streaming Execution Performance with Minimal Design Effort Universiteit Hasselt
This paper proposes a high-level rule set that allows algorithmic designers to optimize their implementation on graphics hardware, with minimal design effort. The rules suggest possible kernel splits and merges to transform the kernels of the original design, resulting in an inter-kernel rather then low-level intra-kernel optimization. The rules consider both traditional texture caches and next-gen shared memory – which are used in the abstract ...
Loop Transformations for the Optimized Generation of Reconfigurable Hardware Universiteit Gent
Current high-level design environments offer little support to implement data-intensive applications on heterogeneous-memory systems; they rather focus on parallelism. This thesis addresses the memory hierarchy problem to high-level transformations of loop structures. The composition of long transformation sequences by combining shorter subsequences is studied together with the influence of the order of applying transformation steps. Several ...
PRNGs for Masking Applications and Their Mapping to Evolvable Hardware KU Leuven
© Springer International Publishing AG 2017. This paper proposes the use of evolutionary computation for the design and optimization of lightweight Pseudo Random Number Generators (PRNGs). In this work, we focus on PRNGs that are suitable for generating masks and secret shares. Such generators should be lightweight and have a high throughput with good statistical properties. As a proof-of-concept, we present three novel hardware architectures ...