Publicaties

Modern processors implement sophisticated performance optimizations, such as out-of-order execution and speculation, that expose programs to so-called transient execution attacks. So far, such attacks rely on specific on-chip covert channels (e.g., cache timing), instilling the hope that they can be thwarted by closing or weakening these channels. In this paper, we consider the inevitable physical side effects of transient execution. We focus on ...

Lattice-based cryptography is a novel approach to public key cryptography (PKC), of which the mathematical investigation (so far) resists attacks from quantum computers. By choosing a module learning with errors (MLWE) algorithm as the next standard, the National Institute of Standards and Technology (NIST) follows this approach. The multiplication of polynomials is the central bottleneck in the computation of lattice-based cryptography. Because ...

The act of executing a program on a computing platform produces inadvertent side effects that depend on the data being processed. Microarchitectural side- channel attacks leverage the side effects stemming from interference in shared
hardware components to extract potentially sensitive data. Arguably the most important class of microarchitectural side-channel attacks are cache attacks, which target the shared cache hierarchy. This thesis ...

Cryptocurrency mining is an energy-intensive process that presents a prime candidate for hardware acceleration. This work-in-progress presents the first coprocessor design for the ASIC-resistant CryptoNight-Haven Proof of Work (PoW) algorithm. We construct our hardware accelerator as a Xilinx Run Time (XRT) RTL kernel targeting the Xilinx Varium C1100 Blockchain Accelerator Card. The design employs deeply pipelined computation and High Bandwidth ...

It is an honor for me to write this overview article and share with the reader the topic of circuits and security. This topic has triggered my curiosity since I started as a Ph.D. student.

FPGA-accelerated computing has received significant attention over the last several years. It offers adaptability of hardware to application requirements and custom accelerators to various computation domains, either in embedded devices or in data-centre scale platforms. For security and cryptography applications, FPGAs allow many-times accelerated computation. Greater acceleration is possible with well-designed accelerators that optimally use ...

This paper proposes an energy and area efficient entropy source, suitable for true random number generation, accompanied with a stochastic model in a 28nm CMOS technology. The design uses a jitter pipelining architecture together with an increased timing resolution to achieve a maximal throughput of 298 Mbit/s and a best energy efficiency of 1.46 pJ/bit at a supply of 0.8V. The generated random bits pass the NIST SP 800-90B IID tests with a min ...