< Terug naar vorige pagina

Publicatie

Efficient Hardware Implementation of Fp-arithmetic for Pairing-Friendly Curves

Tijdschriftbijdrage - Tijdschriftartikel

This paper describes a new method to speed up IF p-arithmetic in hardware for pairing-friendly curves, such as the well-known Barreto-Naehrig (BN) curves. We explore the characteristics of the modulus defined by these curves and choose curve parameters such that IF p multiplication becomes more efficient. The proposed algorithm uses Montgomery reduction in a polynomial ring combined with a coefficient reduction phase using a pseudo-Mersenne number. As an application, we show that the performance of pairings on BN curves in hardware can be significantly improved, resulting in a factor 2.5 speedup compared with state-of-the-art hardware implementations. © 2012 IEEE.
Tijdschrift: IEEE Transactions on Computers
ISSN: 0018-9340
Issue: 5
Volume: 61
Pagina's: 676
Jaar van publicatie:2012
BOF-keylabel:ja
IOF-keylabel:ja
BOF-publication weight:1
CSS-citation score:1
Authors from:Higher Education
Toegankelijkheid:Open