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Onderzoeker
Cor Claeys
- Disciplines:Nanotechnologie, Ontwerptheorieën en -methoden
Affiliaties
- Geassocieerde Afdeling ESAT - INSYS (INSYS), Integrated Systems (Afdeling)
Lid
Vanaf1 aug 2020 → 30 sep 2020 - Geassocieerde Afdeling ESAT - INSYS, Integrated Systems (Afdeling)
Lid
Vanaf19 nov 2007 → 31 jul 2020 - Departement Elektrotechniek (ESAT) (Departement)
Lid
Vanaf1 okt 1999 → 18 nov 2007
Publicaties
1 - 10 van 455
- Temperature-Dependent Electrical Properties of nMOSFETs With Different Thickness Al2O3 Capping Layer and TiN Gate(2021)
Auteurs: huihui Wang, Cor Claeys
Pagina's: 6020 - 6025 - Impact of gate current on the operational transconductance amplifier designed with nanowire TFETs(2021)
Auteurs: Cor Claeys
- Low frequency noise performance of horizontal, stacked and vertical silicon nanowire MOSFETs(2021)
Auteurs: Cor Claeys
- Detailed low frequency noise assessment on GAA NW n-channel FETs(2021)
Auteurs: Cor Claeys
- Low Frequency Noise: A Show Stopper for State-of-the-art and Future Si, Ge-based and III-V Technologies(2021)
Auteurs: Cor Claeys
Aantal pagina's: 3 - Using the Octagonal Layout Style for MOSFETs to Boost the Device Matching in Ionizing Radiation Environments(2020)
Auteurs: Cor Claeys
Pagina's: 754 - 759 - Low-Frequency Noise Assessment of Vertically Stacked Si n-Channel Nanosheet FETs With Different Metal Gates(2020)
Auteurs: Cor Claeys
Pagina's: 4802 - 4807 - Improved physics-based analysis to discriminate the flicker noise origin at very low temperature and drain voltage polarization(2020)
Auteurs: Cor Claeys
- Low-Frequency Noise Characterization of Germanium n-Channel FinFETs(2020)
Auteurs: Cor Claeys
Pagina's: 2872 - 2877 - Analog design with Line-TFET device experimental data: from device to circuit level(2020)
Auteurs: Cor Claeys