CIRCUIT FOR DIGITIZING SUM OF INPUT SIGNALS IN MULTI-BIT SINGLE-LOOP FEED-FORWARD SIGMA-DELTA MODULATOR IN ANALOG-TO-DIGITAL CONVERTER, HAS QUANTIZER COMPRISING LOGIC BLOCK FOR DETERMINING REPRESENTATION OF SUM FROM COMPARATOR OUTPUT SIGNAL KU Leuven
The present invention relates to a circuit for digitizing a sum of at least one first input signal and a plurality of second input signals comprising \n - a passive adder circuit arranged for performing a summation of the second input signals and for outputting a summation signal, \n - a multi-bit quantizer circuit comprising a comparator arranged for comparing said summation signal applied at a first comparator input terminal with a signal applied at a second comparator input terminal, said signal being derived from the at least one first input signal and having an appropriate polarity so ...