Publications
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VHDL design tool flow for portable FPGA implementation Ghent University
In Field-Programmable Gate Array (FPGA) design, the coding style has a considerable impact on how an application is implemented and how it performs. Many popular VeryHigh-Speed Integrated Circuits Hardware Description Language (VHDL) logic synthesis tools like Vivado by Xilinx, Quartus II by Altera, and IspLever by Lattice Semiconductor, have significantly improved the optimization algorithm for FPGA synthesis. However, the designer still has to ...
How preserving circuit design hierarchy during FPGA packing leads to better performance Ghent University
A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA Hasselt University
Stereo matching is a crucial step to extract depth information from stereo images. However, it is still challenging to achieve good performance in both speed and accuracy for various stereo vision applications. In this contribution, a hardware-compatible stereo matching algorithm is proposed and its associated hardware implementation is also presented. The proposed algorithm can produce high-quality disparity maps with the combined use of the ...
Finite-set model-based predictive control for flying-capacitor converters: cost function design and efficient FPGA implementation Ghent University
Recently, there has been an increase in the use of finite-set model-based predictive control (FS-MBPC) for power-electronic converters. However, the computational burden for this control scheme is very high and often restrictive for a good implementation. This means that a suitable technology and design approach should be used. In this paper, the implementation of FS-MBPC for flying-capacitor converters in field-programmable gate arrays (FPGAs) ...
An FPGA based architecture for concurrent system design applied to human-robot interaction applications KU Leuven
This paper presents a hardware and software architecture for vision-based human-robot interaction designed for field programmable gate array (FPGA) based embedded system. The configurable logic and memory blocks connected through programmable interconnects on the FPGA permit programmers to create complex systems running multiple processing cores in parallel, which motivated the authors to implement multiple vision algorithms and robot ...
Optimizing the FPGA memory design for a Sobel edge detector Ghent University
This research explored different memory systems on FPGA chips in order to show the various trade-offs involved with choosing one memory system over another. We explored the different memory components that are found on FPGA chips using the example of a Sobel edge detector. We demonstrated how the different FPGA chip’s memories affected I/O performance and area. By exploiting the trade-offs between these a designer should be able to find an ...
FPGA Design for Algebraic Tori Based Public Key Cryptography KU Leuven
Algebraic torus-based cryptosystems are an alternative for Public-Key Cryptography (PKC). It maintains the security of a larger group while the actual computations are performed in a subgroup. Compared with RSA for the same security level, it allows faster exponentiation and much shorter bandwidth for the transmitted data. In this work we implement a torus-based cryptosystem, the so-called CEILIDH, on a multicore platform with an FPGA. This ...