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Researcher
Nele Mentens
- Disciplines:Cryptography, privacy and security, Embedded systems
Affiliations
- Computer Security and Industrial Cryptography (COSIC) (Division)
Member
From1 Aug 2020 → Today - Dynamical Systems, Signal Processing and Data Analytics (STADIUS) (Division)
Member
From1 Aug 2020 → 31 Jul 2013 - Electrical Engineering Technology (ESAT), Diepenbeek Campus (Technology cluster)
Member
From1 Oct 2013 → 31 Jul 2020
Projects
1 - 10 of 23
- Trust-SEV: Hardware Root of Trust for Smart Electric VehiclesFrom26 Sep 2022 → TodayFunding: FWO Strategic Basic Research Grant, BOF - doctoral mandates
- Trusted Computing Architectures for IoT Devices (Trusted IoT)From1 Sep 2022 → TodayFunding: IWT / VLAIO - TETRA fund
- Evolutionary computation for the optimization of network intrusion detection systemsFrom27 Sep 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Design and implementation of efficient and secure cryptographic coprocessors in emerging technologiesFrom18 Aug 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Flipchip machine for wide-IO chip bondingFrom1 Jan 2021 → 31 Dec 2022Funding: BOF - scientific equipment program
- Holistic Co-Design and Integration in Power Electronic Converters for High Power Density Applications (CoDICApp)From1 Jan 2021 → 31 Dec 2022Funding: Fund Recuperation Fiscal Exemption
- Wearable real-time monitoring system for COVID positive hospitalized patients in the Euregio Meuse-RhineFrom1 Oct 2020 → 30 Sep 2021Funding: Other EU initiatives out of framework
- Embedded AI Techniques for Industrial ApplicationsFrom1 Sep 2019 → 31 Aug 2021Funding: IWT / VLAIO - TETRA fund
- Machine Learning for Network Intrusion Detection on FPGAFrom22 Aug 2019 → 23 Nov 2023Funding: Own budget, for example: patrimony, inscription fees, gifts
- FPGA design for large flow detection in high-speed networksFrom15 Apr 2019 → 26 Jan 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
71 - 80 of 110
- Evolving Cryptographic Pseudorandom Number Generators(2016)
Authors: Stjepan Picek, Vladimir Rozic, Bohan Yang, Nele Mentens
Pages: 613 - 622 - A Search Strategy to Optimize the Affine Variant Properties of S-boxes(2016)
Authors: Stjepan Picek, Bohan Yang, Nele Mentens
Pages: 208 - 223 - Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs(2015)
Authors: Jo Vliegen, Nele Mentens, Dries Schellekens, Ingrid Verbauwhede
Pages: 113 - 122 - Embedded HW/SW Platform for On-the-Fly Testing of True Random Number Generators(2015)
Authors: Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede
Pages: 345 - 350 - Study on impact of adding security in a 6LoWPAN based network(2015)
Authors: An Braeken, Nele Mentens, Kris Aerts
Pages: 577 - 584 - High-speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems(2015)
Authors: Nele Mentens, Frederik Vercauteren, Sujoy Sinha Roy, Ingrid Verbauwhede
Pages: 157 - 166 - Challenges in designing trustworthy cryptographic co-processors(2015)
Authors: Nele Mentens, Stjepan Picek, Vladimir Rozic, Bohan Yang
Pages: 2009 - 2012 - On-the-Fly Tests for Non-Ideal True Random Number Generators(2015)
Authors: Bohan Yang, Vladimir Rozic, Nele Mentens, Ingrid Verbauwhede
Pages: 2017 - 2020 - Secure, remote, dynamic reconfiguration of FPGAs(2015)
Authors: Jo Vliegen, Nele Mentens, Ingrid Verbauwhede
- Cryptographic key management architecture for dynamic 6LowPan networks(2014)
Authors: Ruben Smeets, Kris Aerts, Nele Mentens
Pages: 219 - 229
Patents
1 - 6 of 6
- Mitigating fpga related risks (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)
- Reconfigurable logic circuit (Inventor)
- Reconfigurable logic circuit (Inventor)
- Configurable hardware device (Inventor)