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Researcher
Marian Verhelst
- Disciplines:Nanotechnology, Sensors, biosensors and smart sensors, Other electrical and electronic engineering, Design theories and methods
Affiliations
- Electronic Circuits and Systems (ECS) (Division)
Member
From1 Aug 2020 → 30 Sep 2022 - ESAT - MICAS, Microelectronics and Sensors (Division)
Member
From1 Dec 2007 → 31 Jul 2020 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Oct 2003 → 30 Nov 2007
Projects
1 - 10 of 60
- Explore chiplet-based processors that can be easily integrated together / tiled in a heterogeneous wayFrom29 Apr 2024 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Bringing generative AI to edge devices through interoperable heterogeneous compute coresFrom5 Mar 2024 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Lifelong-Learning Electronic Systems: edge-devices that get smarter day-by-day [LifeLinES]From1 Jan 2024 → TodayFunding: BOF - Methusalem
- Digital in memory compute for low energy biomedical machine learning applicationsFrom23 Nov 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Scalable large array nanopore readouts for proteomics and next-generation sequencingFrom2 Oct 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Efficient scheduling and compilation of embedded multi-core AI platformsFrom1 Sep 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Efficient multi-core processor design for heterogeneous AI workloadsFrom7 Aug 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Outplaying the hardware lottery for embedded AIFrom1 Jun 2023 → TodayFunding: Horizon Europe - European Research Council (ERC)
- System-Technology Co-optimization for enablement of MRAM-based Machine LearningFrom25 May 2023 → 7 Mar 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
- Design Automation and Exploration for Energy Efficient Machine Learning SoCs and ChipletsFrom31 Jan 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
Publications
41 - 50 of 231
- Learn to Learn on Chip: Hardware-aware Meta-learning for Quantized Few-shot Learning at the Edge(2022)
Authors: Nathan Laubeuf, Marian Verhelst
Pages: 14 - 25Number of pages: 12 - Discrete Samplers for Approximate Inference in Probabilistic Machine learning(2022)
Authors: Shirui Zhao, Nimish Shirishbhai Shah, Wannes Meert, Marian Verhelst
Pages: 1221 - 1226 - Impact of Emerging Electrical and Optical 3D Integration Technologies on High Bandwidth Interconnect Systems(2021)
Authors: Nicolas Pantano, Marian Verhelst, Marc Heyns
- Hardware-Efficient Residual Neural Network Execution in Line-Buffer Depth-First Processing(2021)
Authors: Pouya Houshmand, Linyan Mei, Marian Verhelst
Pages: 690 - 700 - Efficient Execution of Temporal Convolutional Networks for Embedded Keyword Spotting(2021)
Authors: Vikram Jain, Marian Verhelst
Pages: 1 - 9 - A 96-channel 40nm CMOS Fully-Integrated Potentiostat for Electrochemical Monitoring(2021)
Authors: Peishuo Li, Marian Verhelst
Pages: 167 - 170 - Embedded ML for Efficient Keyword Spotting(2021)
- ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators(2021)
Authors: Linyan Mei, Pouya Houshmand, Vikram Jain, Marian Verhelst
Pages: 1160 - 1174 - DepFiN: A 12nm, 3.8TOPs depth-first CNN processor for high res. image processing(2021)
Authors: Koen Goetschalckx, Marian Verhelst
Pages: 1 - 2 - Analyzing the Energy-Latency-Area-Accuracy Trade-off Across Contemporary Neural Networks(2021)
Authors: Vikram Jain, Linyan Mei, Marian Verhelst
Number of pages: 4
Patents
1 - 3 of 3