Researcher
Marc Heyns
- Disciplines:Ceramic and glass materials, Materials science and engineering, Semiconductor materials, Other materials engineering
Affiliations
- Surface and Interface Engineered Materials (SIEM) (Division)
Member
From1 Aug 2020 → Today - Surface and Interface Engineered Materials (Division)
Member
From1 Jan 2012 → 31 Jul 2020 - Department of Materials Engineering (Department)
Member
From1 Oct 2007 → 31 Dec 2011 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Oct 2005 → 30 Sep 2007
Projects
1 - 10 of 28
- OPERANDO: In-situ observations of the dynamic processes inside the atomic resolution transmission electron microscopeFrom1 May 2020 → TodayFunding: FWO Medium Size Research Infrastructure
- Magnetoacoustic wave devices for ultralow power spintronicsFrom19 Jun 2019 → TodayFunding: FWO Strategic Basic Research Grant
- 2D Materials: Theoretical study of Magnetic and Contact propertiesFrom7 Dec 2018 → 20 Oct 2023Funding: Own budget, for example: patrimony, inscription fees, gifts
- Micromagnetic simulations for boolean and non-boolean logicFrom1 Sep 2018 → 31 Dec 2022Funding: FWO Strategic Basic Research Grant
- Interface Engineering for Performance Enhancement in 2D Field Effect TransistorsFrom3 Aug 2018 → 14 Mar 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
- Understanding Interface Interactions in Graphene-Ruthenium Hybrids for Next Generation InterconnectsFrom6 Nov 2017 → 12 Jan 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Design and Characterization of Quantum Sillicon-Based Devices for Semiconducting Qubit Implementation.From1 Oct 2017 → 31 Mar 2022Funding: FWO Strategic Basic Research Grant
- Fundamental challenges for two dimensional semiconductorsFrom1 Oct 2017 → 30 Sep 2021Funding: Fund Recuperation Fiscal Exemption
- Design and Characterization of Quantum Devices for Superconducting Qubit ImplementationFrom20 Sep 2017 → 19 Aug 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Electrical Modelling and Characterization of Extended Defects in n Type InxGa1-xAs SystemFrom23 Aug 2017 → 11 Jan 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
481 - 490 of 534
- Indium assisted growth of Si-nanowires: perspectives and controlled VLS growth for CMOS applications
Authors: F Iacopi, Yann Eichhammer, C Massy, Philippe Vereecken, Nele Moelans, O Richard, D Smeets, Bart Blanpain, S De Gendt, Marc Heyns
Pages: 1080 - Perspective of tunnel-FET for future low-power technology nodes
Authors: Anne Verhulst, Devin Verreck, Quentin Smets, Kuo-hsing Kao, Maarten Van de Put, Rita Rooyackers, Bart Soree, Anne Vandooren, Kristin De Meyer, Guido Groeseneken, et al.
Pages: 717 - 720 - Figure of merit for and identification of sub-60 mV/decade devices
Authors: William Vandenberghe, Anne S Verhulst, Bart Soree, Wim Magnus, Guido Groeseneken, Quentin Smets, Marc Heyns, Massimo V Fischetti
Pages: 13510 - 1 - Selective area growth of high quality InP on Si (001) substrates
Authors: Gang Wang, Niamh Waldron, Marc Seefeldt, Marc Heyns
Pages: 1 - 3 - Process-induced positive charges in Hf-based gate stacks
Authors: Stefan De Gendt, Marc Heyns
- \Graphene Transistors and Photodetectors
Authors: Andre Stesmans, Marc Heyns, Stefan De Gendt
Pages: 63 - 68 - Stroboscopic Schlieren Study of Bubble Formation during Megasonic Agitation
Authors: Marc Hauptmann, Steven Brems, Elisabeth Camerotto, Paul W Mertens, Marc Heyns, Stefan De Gendt, Christ Glorieux, Walter Lauriks
Pages: 185 - 189 - Electrochemical and analytical study of the Si etching mechanism in HF
Authors: Marc Heyns, Stefan De Gendt
Pages: 383 - 389 - Influence of environments on the footprint of particle contamination on EUV mask
Authors: Tae-Gon Kim, Stefan De Gendt, Marc Heyns
Number of pages: 7 - Controlled III/V nanowire growth by selective-area vapor-phase epitaxy
Authors: Marc Heyns, Stefan De Gendt
Pages: H860 - H868
Patents
1 - 7 of 7
- Tunnel field effect transistor device and method for making the device (Inventor)
- Graphene based field effect transistor (Inventor)
- A bilayer graphene tunneling field effect transistor (Inventor)
- Bilayer graphene tunneling field effect transistor (Inventor)
- Graphene-based semiconductor device (Inventor)
- Tunnel field effect transistor device and method for making the device (Inventor)
- Graphene based field effect transistor (Inventor)