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Researcher
Ingrid Verbauwhede
- Disciplines:Cryptography, privacy and security, Embedded systems
Affiliations
- Computer Security and Industrial Cryptography (COSIC) (Division)
Member
From1 Aug 2020 → Today - Dynamical Systems, Signal Processing and Data Analytics (STADIUS) (Division)
Member
From1 Aug 2020 → 31 Jul 2013 - ESAT - COSIC, Computer Security and Industrial Cryptography (Division)
Member
From1 Aug 2013 → 31 Jul 2020 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Oct 2002 → 31 Dec 2007
Projects
1 - 10 of 62
- Hardware security modules suitable for embedded devicesFrom9 Apr 2024 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Proof of Concept Prototype for Matching Applications on BELFORT HardwareFrom1 Mar 2024 → TodayFunding: HORIZON.1.1 - European Research Council (ERC)
- Practical security evaluations of existing and new technologiesFrom30 Aug 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Quantum Secure Networks PartnershipFrom1 Mar 2023 → TodayFunding: Horizon Europe - Digital, Industry and Space
- Belgian-QCIFrom1 Jan 2023 → TodayFunding: Digital Europe Programme (DIGITAL)
- Secure Hardware for Post-Quantum CryptographyFrom13 Dec 2022 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Twinning towards excellence for Privacy Enhancing Technologies leveraging Homomorphic EncryptionFrom1 Oct 2022 → TodayFunding: HORIZON.4.1 - Widening participation and strengthening the European Research Area
- Open-source ReSilient Hardware and software for Internet of thiNgsFrom1 Oct 2022 → TodayFunding: HORIZON.2.3 - Civil Security for Society
- Hardware security of IoT devicesFrom19 Sep 2022 → 1 Jun 2023Funding: Own budget, for example: patrimony, inscription fees, gifts
- Combined side-channel and architectural securityFrom13 Jul 2022 → TodayFunding: FWO fellowships
Publications
231 - 240 of 359
- Interface design for mapping a variety of RSA exponentiation algorithms on a HW/SW co-design platform(2012)
Authors: Leif Uhsadel, Markus Ullrich, Ingrid Verbauwhede, Bart Preneel
Pages: 109 - 116 - Efficient Hardware Implementation of Fp-arithmetic for Pairing-Friendly Curves(2012)
Authors: Junfeng Fan, Frederik Vercauteren, Ingrid Verbauwhede
Pages: 676 - A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM based FPGAs(2012)
Authors: Roel Maes, Dries Schellekens, Ingrid Verbauwhede
Pages: 98 - 108 - PUF-based Secure Test Wrapper Design for Cryptographic SoC Testing(2012)
Authors: Amithab Das, Ingrid Verbauwhede
Pages: 866 - 869 - Selecting Time Samples for Multivariate DPA Attacks(2012)
Authors: Benedikt Gierlichs, Ingrid Verbauwhede
Pages: 155 - 174 - Three Phase Dynamic Current Mode Logic: A more secure DyCML to achieve a more balanced power consumption(2012)
Authors: Vladimir Rozic, Ingrid Verbauwhede
Pages: 68 - 81 - Guest Editorial Integrated Circuit and System Security(2012)
Authors: Ingrid Verbauwhede
Pages: 1 - 2 - A Systematic M safe-error Detection in Hardware Implementations of Cryptographic Algorithms(2012)
Authors: Dusko Karaklajic, Junfeng Fan, Ingrid Verbauwhede
Pages: 96 - 101 - Machine Learning Attacks on 65nm Arbiter PUFs: Accurate Modeling poses strict Bounds on Usability(2012)
Authors: Gabriel Hospodar, Roel Maes, Ingrid Verbauwhede
Pages: 37 - Design Solutions for Securing SRAM Cell Against Power Analysis(2012)
Authors: Vladimir Rozic, Wim Dehaene, Ingrid Verbauwhede
Pages: 122 - 127
Patents
1 - 1 of 1
- Random number generator (Inventor)
Linked dataset
1 - 3 of 3