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Researcher
Ingrid De Wolf
- Disciplines:Metallurgical engineering
Affiliations
- Structural Composites and Alloys, Integrity and Nondestructive Testing (SCALINT) (Division)
Member
From1 Aug 2020 → Today - Structural Composites and Alloys, Integrity and Nondestructive Testing (Division)
Member
From1 Jan 2012 → 31 Jul 2020 - Department of Materials Engineering (Department)
Member
From1 Oct 2007 → 31 Dec 2011
Projects
1 - 10 of 29
- Developing Tip-Enhanced Raman Spectroscopy for advanced nanoelectronicsFrom1 Mar 2022 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Design-Technology Co-optimization techniques for enablement of MRAM-based Machine Learning hardwareFrom18 Feb 2022 → 31 May 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Characterization of IMC (intermetallic compound) properties used at 3D stacking high density interconnectsFrom21 Jan 2022 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Machine learning opportunities for reliability researchFrom23 Dec 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Electron-beam based nanoprobing for failure and defect analysis of sub-10 nm node semiconductor devicesFrom23 Dec 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Investigation of void dynamics in metal interconnects under electrical mechanical thermal stimuli using physics based models augmented by machine learningFrom22 Nov 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Reliability of Monolithic Integrated III-V Laser DevicesFrom22 Sep 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Reliability of thin-film IGZO transistors for logic and memory applicationsFrom22 Sep 2021 → TodayFunding: FWO Strategic Basic Research Grant
- Understanding defect generation/recombination processes in Ge-on-Si photodetectorsFrom22 Sep 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Active coolant flow control for energy-efficient integrated package level micro-jet coolingFrom7 Jun 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
Publications
251 - 260 of 307
- The impact of back-side Cu contamination on 3D stacking architecture
Authors: Bert Verlinden, Ingrid De Wolf
Pages: H39 - H41 - Intermetallic Compound Formation in Scaled Solder Joints used for 3D Silicon-to-silicon Stacking
Authors: Lin Hou, Ingrid De Wolf, Nele Moelans
- Raman spectroscopy study of stress in 3D-stacked chips and correlation with FEM and electrical measurements
Authors: Ingrid De Wolf, Veerle Simons, Melina Lofrano, Vladimir Cherman, Joeri De Vos, Geert Van der Plas, Eric Beyne
Pages: 978 - 983 - Edge trimming for wafer-to-wafer 3D integration
Authors: Ingrid De Wolf
Pages: 83 - 84 - Impact of via density on the mechanical integrity of advanced Back-End-Of-Line during packaging
Authors: Luka Kljucar, Mario Gonzalez, Kristof Croes, Ingrid De Wolf, Gayle Murdoch, Joeri De Vos, Juergen Boemmels, Eric Beyne, Zsolt Tokei
Pages: 1778 - 1785 - Reliability study of tunable ferroelectric capacitors
Authors: Ingrid De Wolf
- µ-Raman validated stress-enhanced mobility in XtreMOS transistors
Authors: Ingrid De Wolf
Pages: 84 - 87 - Effect of 4-point bending test procedure on crack propagation in thin film stacks
Authors: Luka Kljucar, Mario Gonzalez, Kris Vanstreels, Andrej Ivankovic, Michael Hecker, Ingrid De Wolf
Pages: 59 - 63 - Analysis of Thermal Crosstalk in Photonic Integrated Circuit Using Dynamic Compact Models
Authors: David Coenen, Ingrid De Wolf
Pages: 1350 - 1357 - Influence of the processing method on the amount and development of voids in miniaturized interconnections
Authors: Biljana Dimcic, Ingrid De Wolf, Bert Verlinden
Pages: 1 - 5
Patents
1 - 9 of 9
- Method for the electrical bonding of semiconductor components (Inventor)
- A method for the electrical bonding of semiconductor components (Inventor)
- Method of detecting manufacturing defects by thermal stimulation (Inventor)
- Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as corresponding assembly of aligned micro-electronic components (Inventor)
- Method for aligning micro-electronic components (Inventor)
- Method for aligning micro-electronic components (Inventor)
- Method for producing an integrated circuit device with enhanced mechanical properties (Inventor)
- Lock in thermal laser stimulation through one side of the device while acquiring lock-in thermal emission images on the opposite side (Inventor)
- Lock in thermal laser stimulation through one side of the device while acquiring lock-in thermal emission images on the opposite side (Inventor)