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Researcher
Arish Sateesan
- Keywords (Hasselt University):Unknown
- Disciplines (KU Leuven):Computer system security, Arithmetic and logic structures
- Disciplines (Hasselt University):Other engineering and technology not elsewhere classified
- See also: Arish SATEESAN (Hasselt University)
Affiliations
- Engineering Technology (Department)
Member
From1 Jun 2019 → Today - Faculty of Engineering Technology (Faculty)
Member
From1 Jun 2019 → Today - Computer Security and Industrial Cryptography (COSIC) (Division)
Member
From1 Aug 2020 → 14 Apr 2024 - Electrical Engineering Technology (ESAT), Diepenbeek Campus (Technology cluster)
Member
From15 Apr 2019 → 31 Jul 2020
Projects
1 - 1 of 1
- FPGA design for large flow detection in high-speed networksFrom15 Apr 2019 → 26 Jan 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
1 - 10 of 11
- Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications(2023)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
Pages: 302 - 318Number of pages: 17 - Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware(2023)
Authors: Arish Sateesan, Jelle Biesmans, Jo Vliegen, Nele Mentens
- Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications(2022)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
- SoK - Network Intrusion Detection on FPGA(2022)
Authors: Laurens Le Jeune, Arish Sateesan, Md Masoom Rabbani, Toon Goedemé, Jo Vliegen, Nele Mentens
Pages: 242 - 261Number of pages: 20 - An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security(2022)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
Pages: 287 - 313Number of pages: 27 - Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows(2021)
Authors: Arish Sateesan, Nele Mentens, Jo Vliegen
Pages: 265 - 276Number of pages: 12 - Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA(2021)
Authors: Arish Sateesan, Nele Mentens, Jo Vliegen
Pages: 347 - 354Number of pages: 8 - A Survey of Algorithmic and Hardware Optimization Techniques for Vision Convolutional Neural Networks on FPGAs(2021)
Authors: Arish Sateesan
Pages: 2331 - 2377 - DASH: Design Automation for Synthesis and Hardware Generation for CNN(2021)
Authors: Arish Sateesan
Pages: 72 - 75Number of pages: 4 - Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications(2020)
Authors: Arish Sateesan, Jo Vliegen, Nele Mentens
Pages: 262 - 269Number of pages: 8