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Researcher
Anne Verhulst
- Disciplines:Nanotechnology, Design theories and methods
Affiliations
- Assiocated Division ESAT-INSYS (INSYS), Integrated Systems (Division)
Member
From1 Aug 2020 → Today - Electronic Circuits and Systems (ECS) (Division)
Member
From1 Aug 2020 → 30 Apr 2010 - Electrical Energy Systems and Applications (ELECTA) (Division)
Member
From1 Aug 2020 → 31 Dec 2007 - ESAT - MICAS, Microelectronics and Sensors (Division)
Member
From1 Oct 2008 → 30 Apr 2010
Projects
1 - 5 of 5
- Enabling 3D scanning probe microscopy for nanoelectronics device analysis and TCAD calibration of advanced technology nodesFrom13 Sep 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- The demonstration of next DRAM with 3D structure using novel channel materialFrom13 Sep 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Calibration of TCAD process simulators towards N2 with advanced 2D/3D metrology solutions including SPM-based SSRM techniqueFrom22 Jun 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Modeling of hybrid nanofluidic-nanoelectronic devices for single-molecule biosensingFrom26 Aug 2021 → 22 Apr 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Modeling of the tunnel field-effect transistor.From19 Oct 2009 → 30 Apr 2010Funding: BOF - Other initiatives
Publications
11 - 20 of 101
- Self-consistent procedure including envelope function normalization for full-zone Schrodinger-Poisson problems with transmitting boundary conditions(2018)
Authors: Anne Verhulst, Guido Groeseneken
- Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET(2018)
Authors: Yang Xiang, Anne Verhulst, Guido Groeseneken
Number of pages: 3 - Impact of calibrated band-tails on the subthreshold swing of pocketed TFETs(2018)
Authors: Jasper Bizindavyi, Anne Verhulst, Guido Groeseneken
Number of pages: 2 - Built-In Sheet Charge As an Alternative to Dopant Pockets in Tunnel Field-Effect Transistors(2018)
Authors: Anne Verhulst, Yang Xiang, Guido Groeseneken
Pages: 658 - 663 - Band-Tails Tunneling Resolving the Theory-Experiment Discrepancy in Esaki Diodes(2018)
Authors: Jasper Bizindavyi, Anne Verhulst, Guido Groeseneken
Pages: 633 - 641 - The Influence of Oxide Thickness and Indium Amount on the Analog Parameters of InxGa1-xAs nTFETs(2017)
Authors: Anne Verhulst, Cor Claeys
Pages: 3588 - 3593 - Calibration of bulk trap-assisted tunneling and Shockley-Read-Hall currents and impact on InGaAs tunnel-FETs(2017)
Authors: Anne Verhulst, Marc Heyns
Pages: 3622 - 3626 - Analysis of the transistor efficiency of gas phase Zn diffusion In0.53Ga0.47As nTFETs at different temperatures(2017)
Authors: Anne Verhulst, Cor Claeys
Pages: 109 - 112 - Self-consistent 30-band simulation approach for (non-)uniformly strained confined heterostructure tunnel field-effect transistors(2017)
Authors: Anne Verhulst, Guido Groeseneken
Pages: 29 - 32 - Calibration of the high-doping induced ballistic band-tails tunneling current in In0.53Ga0.47As Esaki diodes(2017)
Authors: Jasper Bizindavyi, Anne Verhulst, Guido Groeseneken
Number of pages: 3
Patents
1 - 10 of 10
- Tunnel field effect transistor and method for making thereof (Inventor)
- Tunnel field effect transistor device and method for making the device (Inventor)
- Layered structure of a p-tfet (Inventor)
- Layered structure of a p-tfet (Inventor)
- Drain extension region for tunnel fet (Inventor)
- Tunnel field-effect transistors based on silicon nanowires (Inventor)
- Drain extension region for tunnel fet (Inventor)
- A tunnel field-effect transistor with gated tunnel barrier (Inventor)
- Tunnel field effect transistor and method for making thereof (Inventor)
- Tunnel field effect transistor device and method for making the device (Inventor)