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Project

Radiation hardened high-speed ADC for imec’s next generation DARE platform

Radiation hardened integrated circuits are a necessity for applications in space, high-energy physics and nuclear facilities where ionizing radiation causes total dose degradation of the integrated devices as well as reversible and irreversible single-event effects from high-energy particles. The aim of this PhD project is to develop novel radiation-hardening-by-design techniques on system architecture, circuit, and layout level. Their effectiveness will be demonstrated with the design of a state-of-the-art ADC with an ENOB of 12 bits and a ~100 MSa/s conversion speed at a power consumption below 50 mW, implemented in a mainstream 65 nm bulk CMOS IC technology. Before the design is started, the effect of ionizing radiation on the technology will be evaluated using a 3D TCAD simulator, such as Synopsys SENTAURUS. Simulation and layout of the ADC will be performed using CADENCE. The ADC will target a high performance competing with off-the-shelf components in the consumer market while offering both single-event and total dose radiation tolerance compatible with deep space mission requirements.

Date:28 Nov 2017 →  28 Nov 2021
Keywords:ADC, IC-design, radiation hardening, CMOS
Disciplines:Modelling, Multimedia processing, Applied mathematics in specific fields
Project type:PhD project