High Performance, High-Level Integration of Organic Transistors
P-type thin film transistors (TFT) based on latest generation organic semiconductors (for example C8-BTBT and C10-DNTT) display excellent characteristics, with charge transport mobility of up to 10 cm2/Vs in polycrystalline films and 16 cm2/Vs in single crystals. Besides, these organic semiconductors are processed at low temperatures on large area and they display mechanical properties that are compatible with flexible substrate. With such properties, these materials are promising candidates for the fabrication of large area flexible electronics such as backplanes and circuits on plastic film. Moreover, with their good electric performance, these materials reach the quality levels of n-type oxide semiconductors (IGZO), with the additional benefit to be mechanically more flexible and ultimately printable. Examples of potential applications for such circuits are RFID tags, smart packaging, flexible displays drivers and numerous biomedical applications.
However, there are several challenges left unresolved in the present state of the art when integrating these materials into a real process. Prominent ones are the need of very low spread on device parameters, a technology that scales and bias stress stability requirements. Processing techniques must be developed that retain the intrinsic material performance during integration. One possible route to realize this is the exploration of photolithography to pattern the organic semiconductors and to pattern metal contacts on top of them. A second is the integration of doped contacts to ensure perfect contact formation on scaled-down transistors. A third is exploration of new material classes as dielectrics, to avoid the use of less-controlled self-assembled monolayers, which are difficult to upscale.
The purpose of this PhD is to investigate the fabrication of high performance integrated processes for new generations of high-performance p-type organic semiconductors. In order to operate at sufficient speeds, these transistors will be using short channel lengths (≤ 5 µm). This puts strong requirements on the dielectric and the contact resistance at the transistor electrodes. Besides, we will address the following engineering and scientific questions: the quality of the interface between dielectric and semiconductor, the semiconductor patterning, the transistor topology (bottom vs. top contacts) and the alignment and patterning of source and drain contacts with sufficiently short channels, and understanding of organic dielectrics. This PhD will be multidisciplinary and touch many fields of importance in today’s microelectronics industry such as semi-conductor growth, semi-conductor physics, interface engineering, process technologies, novel materials, display and circuits design.