Co-design of Mm-wave Interfaces, Duplexers and CMOS Transmitters
The vision for both the 5th generation mobile communication systems (5G) and the internet of things (IoT) keeps moving towards the final deployment. These new emerging applications require enormous data transmission with low latency among user devices and different networks. Spectral resources at low-GHz range are running low and could hardly meet the requirement either in a wireless or wire-line fashion. Millimeter-wave (mm-Wave) technology is widely considered as one of the key technologies that will continue to serve the consumer demand for increased wireless data capacity. Meanwhile, the advanced CMOS can now well operate in mm-Wave bands, enabling the integration of a full transceiver in a low-cost, high-yield technology. However, the design of a mm-Wave system in advanced CMOS technologies still poses many challenges at both device and architecture levels. In addition to generic difficulties, such as low active gain, low supply voltage and high parasitic loss, we must deal with the distributed effect caused by smaller wavelength at mm-Wave. The dimension of on-chip passive components becomes comparable with the wavelengths at high frequencies and thus microwave theory starts to dominate the matching network design. More importantly, as the extension of the back end of line (BEOL), the interface of integrated circuits (ICs) and the following passive components are the key responsibles for system performance at mm-Wave. However, present design methodology draw a clear line between on-chip and off-chip module designs. When design separately the optimal performance can be achieved within the block level. However, at mm-Wave the interactions between on-chip and off-chip elements become so strong that such a boundary gradually vanishes with increased frequency. Since the distributed effect exists both on-chip and off-chip, superior system performance can be expected if a co-design can be implemented among them with the help of microwave theory. In this doctoral work, the main goal is to innovate a co-design methodology between mm-Wave CMOS building blocks and their RF interfaces that demonstrate better system performance, higher integration level, and low cost than traditional architectures.
The classical circuit and field theories will be reviewed, which together with the transmission line theory, build up the theoretical foundation of the co-design methodology. Typical transmission line formats will be discussed in detail, followed by the fundamentals of impedance matching techniques. These will be extensively practiced in the mm-Wave designs operating at various frequencies. Based on the specific application requirement, details of design consideration, proposed concept, simulation and measurement will be presented. The design examples include:
a) An E-band packaging solution based on wirebonding and flip-chip interconnect. Using all standard components and fabrication process, a robust and wideband interconnect from RF GSG bondpad to WR-12 waveguide interconnect is demonstrated. b) A 28 GHz phased array frontend design in 40nm CMOS. The designed array consists of a high-efficiency and linear power amplifier, a 5-bit passive phase shifter, and a 4-by-4 slot-coupled patch antenna array. The designed array achieves 44 dBm peak EIRP and 60 degrees scanning range. c) Packaging and duplex designs at 120 GHz for high-speed communications through dielectric waveguides. The first real time 10 + 10 Gbps duplex communication is demonstrated in measurement. d) A complete dielectric waveguide data link design at 140 GHz. An automatic compensation loop is proposed and verified in measurement and the designed link supports 4FSK modulation, duplex functionality, and enhanced robustness against PVT variations.