Advanced methodology for the in-line electrical characterization of doped semiconductors in confined volumes.
Our mobile phones and pc’s are faster and less energy-consuming than ever. One major enabler has been that transistors, i.e. the unit cell of these electronic devices, have recently transitioned from a planar architecture towards three-dimensional nano-objects called finFETs. This nanoscale three-dimensional shape indeed makes them more efficient and better controlled electrical switches than their planar ancestors. However, it also changes their electrical properties, i.e. how fast and easily they can conduct electrical current. Besides, this confined size also makes their electrical properties so challenging to access experimentally that complex test structures are now needed to measure them. This project proposes to first develop, evaluate and combine two new metrology solutions to measure the electrical properties of finFETs without requiring test structures. These techniques share the advantage that they can be used in-line, i.e. they allow further processing. Furthermore, their combination allows a two-level analysis as one technique quickly measures the average electrical resistance at the micron scale while the other, though slower, measures the nanoscale details. In a second phase, these techniques will be used to help process engineers to better understand the properties of the material they grow and to improve the performance of their devices. Our vision is that, by addressing this metrology gap, this project should lead to a quick increase in speed of learning.