Tunnel field effect transistor and method for making thereof

A vertical tunneling field effect transistor (TFET) and method for forming a vertical tunneling field effect transistor (TFET) is disclosed. The vertical tunneling field effect transistor TFET comprises a vertical core region, a vertical source region, a vertical drain region and a gate structure. The vertical core region is extending perpendicularly from a semiconductor substrate, having a top surface, consisting of a doped outer part and a middle part. The vertical source region of semiconducting core material comprises the doped outer part of the vertical core region. The vertical drain region of semiconducting drain material comprises along its longitudinal direction a first drain part and a second drain part, the first drain part either directly surrounding said vertical source region or directly sandwiching said vertical source region between two sub-parts of said first drain part, the second drain part located directly above and in contact with the first drain part. The gate structure comprises a gate dielectric layer directly aside of the first drain part of the vertical drain region and a gate layer directly aside of the gate dielectric layer. The second drain part is extending above the gate layer and gate dielectric layer. The vertical tunneling field effect transistor TFET further comprises a drain contact directly connected to a third drain part, the third drain part being an upper part of the second drain part of the vertical drain region. The vertical tunneling field effect transistor TFET further comprises a source contact electrically connected to the vertical source region. The vertical tunneling field effect transistor TFET further comprises a gate contact electrically connected to the gate layer.

Patent Publication Number: US9318583

Year filing: 2014

Year approval: 2016

Year publication: 2016

Status: Assigned

Technology domains: Semiconductors

Validated for IOF-key: Yes

Attributed to: Associatie KULeuven