Reservoir computing device

The present invention relates to a reservoir computing device comprising a cascade of at least two reservoir computing blocks, each reservoir computing block comprising - summing means for making a sum of a block input signal and a delayed signal output by the reservoir computing block, - a digital filter structure arranged for applying a non-linear function to said sum and for adding to a non-linear function output a filtered version of a preceding non-linear function output, yielding a digital filter structure output signal, - a delay line structure arranged for receiving as input the digital filter structure output signal and for outputting a delay line structure output signal to a readout layer, said delay line structure comprising a plurality of delay elements arranged for outputting the delayed signal being a delayed version of the digital filter structure output signal, whereby the block input signal is in the first reservoir computing block of the cascade a signal applied to the reservoir computing device and whereby in each subsequent reservoir computing block of the cascade the block input signal is, according to a given combining pattern, a delayed version of the signal applied to said reservoir computing device, the delay line structure output signal applied to said readout layer by the previous reservoir computing block in the cascade or a combination thereof.

Patent Publication Number: WO2017102972

Year filing: 2016

Year approval: 2018

Validated for IOF-key: Yes

Attributed to: Universitaire Associatie Brussel