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A method for forming a silicide gate for a semiconductor device

According to an aspect of the present inventive concept there is provided a method for forming a gate (12) for a semiconductor device, the method comprising:providing a semiconductor structure comprising a substrate (3) and a channel structure (5) protruding above the substrate,forming a gate dielectric layer (6) on the channel structure,forming a gate work function metal layer (6) on the gate dielectric layer,depositing a sacrificial material of silicon (11) to form a preliminary sacrificial gate fill structure, the preliminary sacrificial gate fill structure covering the work function metal and protruding by an initial height above the substrate,etching back an upper surface of the preliminary sacrificial gate fill structure to obtain a final sacrificial gate fill structure of a reduced height above the substrate, andconverting the sacrificial material of the final sacrificial gate fill structure into a conductive gate fill material (12) by a conversion reaction, thereby forming a silicide gate electrode for the channel structure.
Patent Publication Number: EP3636590
Source: EPO
Year filing: 2018
Year publication: 2020
Status: Requested
Technology domains: Semiconductors, Micro-structure and nano-technology
Validated for IOF-key: Yes