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Project

Security and Reliability for Emerging IoT Networks

The research focuses on security and reliability issues in contemporary IoT networks and devices. As the application domain of the IoT expands, information security and reliable operation have become of paramount importance. Networks and end-devices have adopted the fundamental goals of information security (Confidentiality, Integrity, and Availability). However, as IoT devices are resource-constrained their design must be tailored for each deployment and application, which results in a diverse technological landscape in terms of device architecture and wireless protocols. This resource-constrained and heterogeneous landscape makes full support for the CIA triad challenging. With recent technological advancements, the capabilities of these resource-constrained devices and networks have been extended, but this also opens up new attack surfaces and reliability issues. Throughout this research, we investigated a contemporary IoT network, LoRaWAN, to demonstrate how state of the art networks and devices open up new attack surfaces, violating the CIA triad's main pillars, and how to mitigate these issues without compromising the fundamental goals of information security. Following chapters presents contributions during this research.

-Chapter2 provides an overview of the current technological landscape of IoT devices and networks. This chapter discussed the fundamental goals of the CIA triad and the challenges of adopting these principles in the IoT context. This chapter includes: (i) a review of IoT device architectures focusing on key hardware building blocks (Processing, Memory, Energy Source, and Radio) and (ii) background information on LPWAN  and LoRaWAN. 

-Chapter3 identified new attack vectors and reliability issues on a contemporary IoT technology; LoRaWAN. New features and characteristics of LoRaWAN cause contemporary attack threats which violate the fundamental goals of CIA Triad. The results showed that LoRaWAN is vulnerable against; (i) compromising device and network keys, (ii) jamming techniques, (iii) replay attacks, (iv) wormhole attacks, and (v) premature device failure. 

-Chapter4 focuses on jamming techniques and wormhole attacks and presents the design of novel attacks against LoRaWAN networks. As discussed throughout this dissertation, security issues in LoRaWAN arise due to the slow modulation scheme, the lack of a common clock, and limited use of channel hopping. This chapter shows how to exploit these issues to develop a realistic attack against these networks. The evaluation showed that (i) off-the-shelf LoRaWAN end-devices can interfere with each other's transmission, (ii) end-devices can be selectively jammed due to the slow-modulation technique, and (iii) a combination of various vulnerabilities which makes replay attacks possible despite the countermeasures in the protocol.  

-Chapter5 presents a design of a MAC protocol; CRAM, as a countermeasure against the attacks presented in Chapter 4. As discussed in Chapter 4, despite its early success, LoRaWAN performs poorly in dense deployments. CRAM utilizes time synchronization and cryptographic channel hopping to reduce collisions while ensuring reliability and scalability. This chapter shows that maximizing channel utilization  (i) significantly reduces the threat of selective jamming and (ii) increases scalability and reliability in comparison to the standard LoRaWAN protocol.  

-Chapter6 tackles a memory reliability issue observed during the experiments in Chapter 5. The flash memory that is used in IoT devices offers limited write endurance. High-data rate applications can reach that limit within the device lifetime, resulting in premature device failures. To overcome this problem, this chapter contributes a simple and unified interface for reliable non-volatile storage on IoT devices that provides lifetime guarantees that dramatically extend the lifetime of flash memory while minimising overhead.

-Chapter7 presents Chimera, a reconfigurable IoT platform with multi-year battery life. Chimera aims to achieve flexibility, re-usability, and adaptability through an architecture based on a Flash Field Programmable Gate Array (Flash FPGA) with a reconfigurable software stack that enables over-the-air hardware and software evolution at run-time. This adaptability enables low-cost hardware/software upgrades on the end-devices and an increased ability to handle computationally-intensive tasks. Chimera attempts to tackle the deeply rooted issues in IoT security and reliability by providing Confidentiality and Integrity without compromising Availability. This chapter describes the design of the Chimera hardware platform and software stack, evaluating it through three application scenarios, and reviews the factors which have thus far prevented FPGAs from being utilized in IoT end-devices. Chimera bridges the gap between low-power and high-end reconfigurable platforms and shows that it is possible to utilize FPGAs in battery-powered devices.

Date:13 Oct 2016 →  10 Feb 2021
Keywords:Embedded Systems, Operating Systems, Computer Architecture, Low-level security
Disciplines:Applied mathematics in specific fields, Computer architecture and networks, Distributed computing, Information sciences, Information systems, Programming languages, Scientific computing, Theoretical computer science, Visual computing, Other information and computing sciences
Project type:PhD project