Energy efficient SRAM design in deep submicron technology

Semiconductor industry has entered deep submicron technology (DSM) these days. Transistors are made very small, providing many opportunities for energy efficient and high speed designs. It has been proven that these transistors can run with ultra high speed. Nevertheless, it is less evident that the same amount of gain is possible in terms of energy efficiency. This Phd tries to explore the energy efficiency possibility with deep submicron technology, with SRAM as a designing goal. The outputs of this Phd are as follows: design strategies for SRAM in DSM based on analytical and experimental data; several SRAM chips validating our work.