Design of algorithmic countermeasures protecting implementations against physical attacks

Cryptographic devices have been increasingly vulnerable by a diverse range of physical attacks that are involved in physical access to reveal secret keys. Most common attacks are the side-channel attacks (SCA) and fault injection attacks (FA). The former, which are referred to as passive attacks, involve measuring execution time, power consumption or electromagnetic radiation collected during the execution of cryptographic operations. The latter, which are referred to as active attacks, are injecting faults into the devices by clock glitches, power glitches or changing the temperature of the environment. Several countermeasures have been proposed against each of these attacks separately and also combined. However, the countermeasures that are against combined attacks are still new and experimental. The thesis will be focused on developing novel methods for protecting HW/SW implementations against combined physical attacks. First the previous methods will be investigated to observe their strengths and weaknesses. Next, new combined countermeasures will be designed on the algorithmic level with a focus on improved performance and more realistic adversary models. The student will also work on SW implementations on the RISC V platform with the goal to investigate the source of leakage of masked SW implementations.