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Project

High Level Synthesis Framework for Fast Prototyping of Embedded Video Processing Pipelines (R-7693)

This Ph.D. research work proposes to develop a High-Level Synthesis (HLS) Framework for Fast Prototyping of Embedded Video Processing Pipelines. Frameworks are really popular in software domain and offer significant productivity gains. Every framework targets a certain application area. That is why HLS fell short between 1985-2000. Now, HLS is finding wide spread use in FPGA domain but people mostly expect acceleration from it. Here, we plan to offer a specialized HLS tool that fits within a pipeline based video processing framework for cost effective implementation of real-time (not just accelerated) applications. This framework with its HLS tool will enable quick design iterations and do that without compromising performance and will be able to drive implementations that satisfy the requirements of the embedded world.
Date:1 Jun 2017 →  Today
Keywords:High-Level Synthesis (HLS)
Disciplines:Manufacturing engineering, Ceramic and glass materials, Materials science and engineering, Semiconductor materials
Project type:Collaboration project