Interface Engineering for Performance Enhancement in 2D Field Effect Transistors

2-dimensional (2D) semiconductors such as 2D transition metal dichalcogenides (MX2) have recently drawn much attention in the field of nano-electronics due to their potential for superior electrostatic control and heterogeneous integration. However, current MX2 devices suffer from high source and drain contact resistance, high defect density and low capacitance/charge build-up in the channel. To mitigate these challenges, it would be beneficial to place emphasis on the 2D form factor in the device design, to fully utilize the structural advantages such as atomic-layer construction, periodicity, polarity as well as grain crystallinity and grain boundary to improve contact, transport and gating while down-scaling the device dimension. The objective of this Ph D research is to demonstrate nano-scale devices using 2D materials as channels, contacts and dielectric surroundings; to experimentally explore the performance and scaling potentials of the 2D materials metal-oxide-semiconductor field-effect transistor (MOSFET). On the 2D channel we will investigate the impact of grain boundaries and Lg scaling. For contact resistance study we will implement edge contact schemes, including metal-MX2 and graphene-MX2 edge contacts to explore and examine the 2D form factor. For gate stack study, besides interface trap density (Dit) reduction, we will investigate the role of the van der Waals gap between the 2D channel and the gate dielectric and attempt to mitigate its impact on EOT with combinations of MX2/2D-dielectrics (h-BN, h-AlN, GaN*) and potentially MX2/ferroelectric oxides.  *Nature Materials 15, 1166–1171 (2016) “Two-dimensional gallium nitride realized via graphene encapsulation”