Optimal Deep Learning implementations on FPGA for industrial image processing applications

Reliable object detection methodologies pave the way for numerous industrial real-life applications (e.g. autonomous cars, abnormal behaviour detection in surveillance scenarios and so on). Traditionally, such methodologies rely on hand-crafted features. In the past few years however there has been a rising interest in embedded deep learning algorithms by both academic and industrial research groups, which achieve state-of-the-art accuracy performance. However, the great computational demands of such algorithms severly limit their applicability in these real-life industrial applications on small and hand-held devices, where all processing must be don on-board and within a strict power budget. Typical points of interest concerning the hardware of these embedded systems are the computational power, flexibility of programming, power usage, development time/cost, die size,... Existing research supports the choice of state of the art FPGAs as an alternative for GPUs when implementing deep learning algorithms, especially when looking at power usage, flexible (re-)programming and computational power. In this PhD-study, we will research methods to further improve and accelerate the implementations of (existing/pretrained) neural networks on FPGAs, taking into account the hardware restrictions and specifications of both low-cost and/or high-end FPGAs. We will constantly focus on the applicability and the ease-of-use of these techniques, such that they are easily adoptable by industrial players. We will closely work together with industrial companies during this study and we will use realistic use-cases for image processing applications (person-detection and person (re-)identification, behaviour detection,...) to test and support the claims of our research.